Job Description

Principal Analog and Mixed-Signal Circuit Designer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and experienced Analog and Mixed-Signal Design Engineer with a strong background in CMOS analog and mixed-signal circuit design. You thrive on tackling complex challenges and are excited about the opportunity to work on cutting-edge PLL designs that will power the next generation of datacenters, automobiles, and communications networks. You have a keen eye for detail and excel in designing high-speed digital circuits and analog components. Your technical expertise is complemented by your ability to mentor junior designers and collaborate effectively with layout and CAD teams. With a deep understanding of PLL loop operation and design, you are ready to contribute to high-speed SerDes designs, including PCI-Express, Ethernet, and CPRI applications at rates up to 224Gbps and beyond.

What You’ll Be Doing:

• Circuit-level PLL design and PLL top-level modeling and simulation
• Design of analog circuits such as VCOs, charge pumps, and voltage regulators
• Custom circuit design in deep-submicron and FINFET CMOS technologies
• Design of high-speed digital circuits such as dividers and clock distribution paths
• Schematic entry and spice simulation of custom circuits
• Provide mentoring and technical leadership to junior designers
• Coordinate and interface with layout and CAD teams

The Impact You Will Have:

• Enable the development of next-generation datacenters, automobiles, and communications networks
• Drive innovation in high-speed SerDes designs, supporting applications at rates up to 224Gbps
• Enhance the performance and reliability of analog and mixed-signal circuits
• Mentor and develop the next generation of talented designers
• Collaborate across teams to ensure seamless integration and optimization of designs
• Contribute to the advancement of cutting-edge CMOS technology nodes

What You’ll Need:

• 8+ years of experience in CMOS analog and mixed-signal circuit design with an MSEE or PhD. Candidates with a Bachelor’s degree and additional experience will also be considered
• Detailed knowledge of PLL loop operation and design
• Experience in the design of SerDes blocks and/or PLL circuit components such as VCOs, charge pumps, regulators, and high-speed dividers
• Design experience in FINFET and gate-all-around CMOS technologies
• Proficiency with Hspice, Finesim, PrimeSim, or similar spice-type simulators
• Experience with schematic entry in Synopsys Custom Designer or similar tools
• Knowledge of digital timing in PrimeTime and/or Nanotime is an asset

Who You Are:

• Detail-oriented with a strong analytical mindset
• Effective communicator and collaborator
• Innovative thinker with a passion for problem-solving
• Dedicated mentor and team player
• Adaptable and eager to learn new technologies

The Team You’ll Be A Part Of:

You will join the PLL design team, a dedicated group of engineers focused on creating innovative designs that enable the next generation of high-speed communication systems. Our team collaborates closely with various departments, including layout and CAD teams, to ensure the successful delivery of high-performance PLLs and SerDes designs. We value creativity, technical excellence, and a collaborative spirit, and we are committed to pushing the boundaries of what is possible in analog and mixed-signal design.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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